eRegPushImm2,
eRegPushImm3,
eRegPushImm4,
+ eRegPush2Imm,
eRegPushMem,
eRegPushMem2,
eRegPushMem3,
#define RegPushImm2 (f_instr)eRegPushImm2
#define RegPushImm3 (f_instr)eRegPushImm3
#define RegPushImm4 (f_instr)eRegPushImm4
+#define RegPush2Imm (f_instr)eRegPush2Imm
#define RegPushMem (f_instr)eRegPushMem
#define RegPushMem2 (f_instr)eRegPushMem2
#define RegPushMem3 (f_instr)eRegPushMem3
gw_out(" {-M}%-14"UINT_F"{0}", instr->m_val2);
gw_out("\n");
break;
+ case eRegPush2Imm:
+ gw_out("{Y}┃{0}{-}% 4lu{0}: RegPush2Imm ", j);
+ gw_out(" {-R}%-14p{0}", instr->m_val);
+ gw_out(" {-M}%-14"UINT_F"{0}", instr->m_val2);
+ gw_out("\n");
+ break;
case eRegPushMem:
gw_out("{Y}┃{0}{-}% 4lu{0}: RegPushMem ", j);
gw_out(" {-R}%-14"UINT_F"{0}", instr->m_val);
RegPushImm2~f~u
RegPushImm3~p~u
RegPushImm4~p~u
+RegPush2Imm~p~u
RegPushMem~u~u
RegPushMem2~f~u
RegPushMem3~u~u
const m_uint offset = emit_local(emit, emit->gwion->type[et_int]);
for(uint32_t i = 0; i < handlers->len; i++) {
Handler *handler = mp_vector_at(handlers, Handler, i);
- // useless args. should be not in the VM
const Instr instr = emit_add_instr(emit, HandleEffect);
instr->m_val = emit->status.effect = offset;
- instr->m_val2 = (m_uint)handler->xid; // are we even using this?
+ instr->m_val2 = (m_uint)handler->xid;
CHECK_BB(scoped_stmt(emit, handler->stmt));
emit_try_goto(emit, v);
instr->m_val = emit_code_size(emit);
CHECK_BB(cdef_parent(emit, c));
if (c->body) {
emit_class_code(emit, t->name);
-// if (scanx_body(emit->env, c, (_exp_func)emit_section, emit) > 0 && vector_size(&emit->code->instr) > 1)
- if (scanx_body(emit->env, c, (_exp_func)emit_section, emit) > 0)
-{
-// if (vector_size(&emit->code->instr))
-// if (tflag(t, tflag_ctor))
+ const m_bool ret = scanx_body(emit->env, c, (_exp_func)emit_section, emit);
+ if (ret > 0 && tflag(t, tflag_ctor))
t->nspc->pre_ctor = finalyze(emit, FuncReturn);
-/*
-else{
-puts("hehe");
-free_code(emit->gwion->mp, emit->code);
- emit_pop_code(emit);
-}
-*/
-} else {
+ else{
free_code(emit->gwion->mp, emit->code);
emit_pop_code(emit);
- return GW_ERROR;
}
+ return ret;
}
return GW_OK;
}
__attribute__((hot)) void
vm_prepare(const VM *vm, m_bit *prepare_code) { // lgtm [cpp/use-of-goto]
static const void *dispatch[] = {
- &®setimm, &®pushimm, &®pushfloat, &®pushother, &®pushaddr,
+ &®setimm, &®pushimm, &®pushfloat, &®pushother, &®pushaddr, &®pushtwoimm,
&®pushmem, &®pushmemfloat, &®pushmemother, &®pushmemaddr,
&®pushmemderef, &&pushnow, &&baseint, &&basefloat, &&baseother,
&&baseaddr, &®toreg, &®toregother, &®toregother2, &®toregaddr, &®toregderef,
*(m_uint **)reg = &VAL;
reg += SZ_INT;
DISPATCH()
+ regpushtwoimm:
+ *(m_uint *)reg = VAL;
+ *(m_uint *)(reg + SZ_INT)= VAL2;
+ reg += SZ_INT*2;
+ DISPATCH()
regpushmem:
*(m_uint *)reg = *(m_uint *)(mem + IVAL);
reg += SZ_INT;
} else {
static void *_dispatch[] = {
- &&_regsetimm, &&_regpushimm, &&_regpushfloat, &&_regpushother, &&_regpushaddr,
+ &&_regsetimm, &&_regpushimm, &&_regpushfloat, &&_regpushother, &&_regpushaddr, &&_regpushtwoimm,
&&_regpushmem, &&_regpushmemfloat, &&_regpushmemother, &&_regpushmemaddr,
&&_regpushmemderef, &&_pushnow, &&_baseint, &&_basefloat, &&_baseother,
&&_baseaddr, &&_regtoreg, &&_regtoregother, &&_regtoregother2, &&_regtoregaddr, &&_regtoregderef,
PREPARE(regpushfloat);
PREPARE(regpushother);
PREPARE(regpushaddr);
+ PREPARE(regpushtwoimm);
PREPARE(regpushmem);
PREPARE(regpushmemfloat);
PREPARE(regpushmemother);
instr->m_val = next->m_val;
next->opcode = eNoOp;
}
+ } else if (instr->opcode == eRegPushImm) {
+ const Instr next = (Instr)vector_at(v, i+1);
+ if (next->opcode == eRegPushImm) {
+ instr->opcode = eRegPush2Imm;
+ instr->m_val2 = next->m_val;
+ next->opcode = eNoOp;
+ }
} else if (instr->opcode == eUnroll2) {
const Instr unroll = (Instr)instr->m_val;
const m_uint pc = vector_find(v, (m_uint)unroll);